The Ware for July 2013 is a Motorola 68851 PMMU, courtesy of Andreas Ehliar. I look forward to seeing many more beautiful die shots of retro-ware like this at his blog over the coming months….here are his notes about the ware:
I got this chip from a colleague together with a 68020 and a 68881. I initially thought this particular chip would be the least interesting, but so far it is my favourite of these due to the unexpected complexity.
My first guess was that it would essentially just consist of a CAM memory, but an initial inspection using a stereo microscope revealed that there was a very interesting memory structure to the right which I guessed was a microcode memory (since I have seen a similar looking memory in the 68000). A look at the manual  actually confirmed this, as the manual surprisingly reveals that a two level control store is used. A simplified block diagram which is suspiciously similar to the actual layout of the chip (see figure 1-2) is also included.
However, the low level details can be found in an article in IEEE Micro which actually contains a (very low res) die photo as well .
Other low level details can probably be found in some Motorola patents regarding PMMU’s as well, although the 68851 is never named by name here. (However, 68020 specific terminology is used such as CALLM/RTM. See for example figure 2 in .
Anyway, it turns out that putting the MMU off-chip was most likely a pretty bad decision, as the 68030 proved that it is much more efficient to have the MMU on-chip rather than off-chip. (See the chip photo of a 68030 on Wikipedia where the MMU can be seen in the upper left corner if I understand things correctly.) (The 68030 is actually very similar to a 68020 in terms of the layout, the part in the upper left corner is one of the few things that seems to be changed, as well as what I assume to be an added data cache to the right.
I think this could be interesting as a ware because the microcode memory would (probably) cause you to think about processors, although the rest of the chip doesn’t really look like a processor. (Too much memory for this time period, no real execution unit, etc.)
 The Design and Implementation of the MC68851 Paged Memory
Management Unit by Brad Cohen and Ralph McGarity in IEEE Micro
 US patent 4763244
Nobody managed to guess this one, so it’s hard to pick a winner. I liked reading Taniwha’s explanations and thoughts, so I’ll declare Taniwha the winner. Email me for your prize!