Using the SuperH RISC Engine's PWM Feature as a Switching Digital to Analog Converter

By Andrew Huang

bunnie@mit.edu


1. Abstract

Designers using the SuperH RISC Engine who find themselves wanting an embedded D/A converter need not look far. The Integrated Timer Unit (ITU) of the SH7032 microprocessor features a PWM mode which can be used as the heart of a switching D/A converter. This application note describes the theory and implementation of small signal and power switching D/A converters using the PWM feature.

2. Introduction

Switching technology has become ubiquitous as a result of its high efficiency and compact size-for example, most of today's power supplies and motor/industrial control systems are based on switching technology. The disadvantage of switching technology is that control element is more complex than linear technologies, and that failures in the regulation circuitry or switching transistors can lead to catastrophic system failures. The SuperH RISC Engine offers a flexible, reliable, and cost effective solution to the switching control problem because of its rich variety of integrated peripherals. Also, intelligent, adaptive control systems are viable as a result of the processing power available in the SuperH. This application note presents some of the possibilities and discusses in detail an application of the SH-1 as a direct digital class D audio amplifier.

3. Pulse Width Modulation Theory in a Nutshell

Pulse Width Modulation (PWM) refers to a form of signal modulation where data is represented by the ratio of on to off pulse widths (known as the duty cycle, and expressed as a percentage of time on). PWM has the property where the instantaneous DC component is directly proportional to the duty cycle. As an example, a PWM signal with an 80% duty cycle is depicted to the left. The relationship between the time-average voltage (Vavg) the high and low voltages of the square wave (Vhi and Vlo) and the duty cycle (D) in percent is as follows:

Vavg = (Vhi - Vlo) * (D / 100) ---- [equation 1]

If Vhi were 5V and Vlo were 0V in this example, Vavg would be 4 V. However, the issue of what is the right way to take the time average in order to achieve this result is tricky and requires a bit of theory.

The frequency spectrum of a PWM signal consists of a DC component located at w = 0 and other harmonics, with the lowest harmonic located at the modulation frequency. An ideal low pass filter with a cutoff frequency lower than the modulation frequency will eliminate all the upper harmonics and preserve only the DC component-which is the same as Vavg. In the real world, a low pass filter with a sufficiently small attenuation at the modulation carrier frequency will produce a DC signal with some high frequency ripple. The higher the modulation frequency, the easier it is to design the low pass filter.

Figure 1: Frequency spectrum of PWM modulated signal and filters.

If the duty cycle of the PWM signal is modulated at frequencies below the low pass filter cutoff frequency and consequently below the carrier frequency, a signal with a bandwidth equivalent to the passband of the low pass filter results. This signal has an instantaneous magnitude obeying the relationship described in equation (1).

4. Switchmode Applications of the SH-1 PWM

By taking advantage of this theory, an SH RISC's PWM feature can be used as a digital to analog converter. Unlike conventional D/A converters, a PWM-based converter (here on referred to as a switching D/A converter) has no fixed resolution or sample rate. This is because programmable switching D/A converters such as the kind constructed with an SH-1 exhibits a unique constant resolution-sampling rate product (RSRP) property. In other words, the product of the converter resolution measured in steps (2 bits of resolution) and the theoretical sampling rate measured in samples/second is a constant. In the case of the SH7032, the product comes out to be 20 million step * samples/second (ssps). This number is equal to the maximum PWM carrier frequency of the SH7032, clocked at 20 MHz and configured for counting rising edges only. Of course, the RSRP is a theoretical maximum; near this limit, output quality decreases, especially when the number of steps is small, due to limitations in the cutoff rate of the output filter. Note that the output filter also serves as the antialiasing filter.

Table 1 summarizes some of the sampling rates and resolutions achievable by the SH7032, assuming the ITU is configured to count rising edges. Note that the RSRP can be doubled by counting both rising and falling edges.

Resolution, bits resolution, steps sampling rate, sps

1

2

10000000

2

4

5000000

4

16

1250000

6

64

312500

8

256

78125

10

1024

19351

16

65536

305

Table 1: Resolution in bits and steps versus sampling rate in samples per second for the SH7032 Microprocessor. The RSRP can be doubled if the ITU is configured to count both rising and falling edges.

Figure 2 gives an example block diagram of a flexible, accurate closed-loop D/A system. This system is intended for use in small-signal applications.

Figure 2: SH7032 used as a "Smart Wire": a black box which takes in an analog signal, applies a specific transfer function H(w), and returns an analog signal. The ITU generates clock signals for the programmable switched capacitor low pass filter as well as the PWM signal proper; the A/D converter provides feedback information which is stored in internal RAM by the DMA controller. Real-time operation is realized by the interrupt handler.

Note that the MF6 switched capacitor low pass filter gives the system a unique variable-cutoff low pass filter for antialiasing and output filtering. One of the A/D converter channels is allocated as an analog signal input, so the SH7032 is a fairly self-contained analog in-analog out signal processing box: dubbed a "smart wire", it is a very useful tool. The SH's Multiply-Accumulate (MAC) unit aids in fixed-point signal processing such as FIR filtering, making this unit very practical for a wide range of applications. The SH-1 microprocessor is uniquely suited for such control applications due to its rich variety of integrated peripherals and its high performance RISC core.

The true strength of switched D/A conversion is demonstrated in power applications. Building on experience gained from switching power supplies, the SH Engine's PWM output can be used to directly drive high power switching transistors. Like switching power supplies, efficiencies in excess of 90%, operation down to DC, and huge power drives (hundreds of watts-limited only by the capability of the output transistors) are easily achieved. This is in stark contrast to conventional linear amplifier approaches, where efficiency is low due to DC bias currents, and operation down to DC is impossible because of coupling capacitors.

As a simple example, the SH7032 can be used as an intelligent switching power supply controller. The A/D converter can be used to provide feedback so that I*V losses [voltage drop due to wire resistance, changes with current loading] are automatically compensated. The SH7032 can also provide the host system with vital information regarding power consumption, system temperature, and power line fluctuations via the integrated serial communication interface (SCI).

An application of the SH7032 which takes greater advantage of its capabilities is direct digital audio amplification. Switching audio amplifiers, also known as class D amplifiers, have long been curiosities for adventurous audiophiles only. Switching amplifiers have not entered mainstream applications partly because the control of such amplifiers is difficult. The SH7032 makes an excellent low cost controller for a class D amplifier.

The block diagram in Figure 3 summarizes the class D amplifier design:

Figure 3: Block diagram of the direct digital class-D audio amplifier application.

Digital data from a Sony D-141 CD player arrives in standard multiplexed serial format, as shown in Figure 4. The bit clock (BCLK) rate is around 2.1 MHz-just a tad too fast for the SH-1 to directly perform the serial to parallel data conversion. An SH-2 series engine which supports branch delay slots could do the conversion without external hardware assistance. Although the Sony D-141 portable CD player does not come standard with digital outputs, the CD player was appropriately hacked to tap the information off of the servo controller. It is important to note that the CD player uses 3V logic and provides very little current drive, hence the need for pull-up resistors as indicated on the schematic.

Figure 4: Serial data format, taken from the Sony Computer Audio data book.

The parallel digital data is then read in by the SH7032 and sent to ITU number 3, configured for PWM mode. ITU number 3 was chosen because it supports double-buffered writes. Without buffering, the GRB (upper compare) value could change in the middle of a PWM cycle and cause spurious results.

The PWM output is then boosted by power switching transistors. In the actual test circuit, a darlington emitter follower to prove the concept, but a higher power (100+ W peak) configuration utilizing MOSFETs is also provided on the circuit schematic. The amplified PWM signal is then fed through a 4 pole butterworth filter with a cutoff at around 20 kHz. The butterworth filter is chosen for its flatness in the passband. The filter uses only inductors and capacitors, so with proper part selection, it can handle the high power requirements of the design. The output of the filter drives an 8W speaker. Schematics and code listings for a system based on the SH-1 Evaluation Board (EVB) can be found in Appendix A.

The system as tested provides 8 bits resolution at a sampling rate of 44.1 kHz. Objective measurements on signal quality could not be performed since the instrumentation was not available; however, subjective observation with a hi-fi stereo as a control [reference for evaluation] showed that the sound quality was adequate and free of artifacts except for quantization noise (at 8 bits resolution, quantization limits the maximum SNR to 48 dB). One advantage this class-D amplifier has over all other linear amplifiers is in its low frequency response-all the way down to DC. This advantage was noticeable in the subjective evaluation.

5. Conclusion

The SuperH RISC Engine's PWM feature can be adapted to switching D/A conversion with a minimum of additional parts. The conversion quality and speed is sufficient for many instrumentation and audio applications. Because the conversion is based on switching technology, it can be used to drive high power devices without the bulk and inefficiency of large linear amplifiers. In addition, the presence of integrated peripherals and the high performance RISC core opens the door for novel applications previously impractical to implement using only low-integration analog and digital components.


Appendix A

Here is the code which runs on the SH-1 EVB. The main file, cd1.c, is listed first, and then the include files, iosh7030.h and montraps.h, are listed next. Schematics for this system based on the SH-1 EVB can be found on the last page.

cd1.c

iosh7030.h

montraps.h

schematics (in postscript form)


Notes and References

This application note was written as an entry for the $10,000 SH-RISC design competition. It won a first prize award ($2,500) for "Best Application Note". This app note will be printed in EDN Magazine, and I will put a link to the on-line article as soon as it is published.

Made by National Semiconductor-"MF6: 6th Order Switched Capacitor Butterwoth Lowpass Filter". A datasheet can be found on the web at http://www.national.com/pf/MF/MF6.html

The design of the high power switching transistors and the output filter come from the Motorola Power Applications Manual, "AN1042: High Fidelity Switching Audio Amplifiers Using TMOS Power MOSFETs", pages 193-203, book code DL410/D rev. 1.


Created 9/15/96 19:17 PST by Andrew Huang (bunnie@mit.edu)

Last modified 9/15/96 19:17 PST by Andrew Huang (bunnie@mit.edu)


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